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                    "c64-hw-sim\nc64-hw-sim simulates the motherboard of the Commodore 64, ASSY 250407, pin\nby pin. You can lift the leg of a chip, short it to ground or to +5V, pull a\nchip out of its socket, or open a resistor. Then you watch what the machine\ndoes: the picture on the monitor, the keyboard, every signal on the board.\nThe program knows the board's netlist (the electrical connections on the\nPCB) and how each chip behaves at its pins. It knows nothing about what a\nbroken Commodore 64 looks like: when you simulate a broken part and the\nscreen fills with garbage, that garbage was computed from the circuit, not\nchosen by someone who knew what to expect.\nHere is an example. Lift pin 17 (A7) of the color RAM before power on, and\nthe machine boots and looks healthy. The CPU writes and the VIC reads with\nthe same wrong address, so the RAM simply aliases. Put the leg back, and\nthe half of the color RAM that was never written shows up as random\ncolors. Lift it again, and the screen is clean. A real 2114 does the same.\nWith this program you can do mainly two things:\n\nLearn how the Commodore 64 works at a more intimate level, in a way that\nis hard to reproduce on real hardware without the risk of damaging it\n(and on most boards many chips are soldered, not socketed).\nIf you have a broken C64 and some hypothesis about what could be broken,\nsimulate it with this program and perhaps gain clues, so that you can\ndesolder chips in the most logical order, and desolder as few of them as\npossible (desoldering is a boring process, and every time it risks\ndamaging the board...). A matching symptom is a clue, not a proof:\ndifferent faults can look the same, and the simulation has its limits\n(see below).\n\nPlease note that even on fast computers this program struggles to\nsimulate the C64 hardware at real speed. A real C64 is simulated at 31% of\nits speed on an Apple M3 Max, 39% on an AMD Ryzen AI Max+ PRO 495 (Gorgon\nHalo), and 48% on an Apple M5 Max. This is not a problem for the goals of\nthis program, but be warned: it is not an emulator to play games with.\n\nAbove: the classic 10 PRINT CHR$(205.5+RND(1));:GOTO 10 maze is running\nwhen the character ROM (U5) is pulled out of its socket, and later put\nback. The CPU, the RAM and the program keep working; only the shapes of\nthe characters are lost, as repairers know well. The scope is on the data\nline D0 of the ROM socket: with the socket empty, the bus floats (the\ndotted segments) whenever the VIC fetches a character shape. Shown at C64\nspeed.\nAcknowledgements\nI (antirez) got the idea for this program while using and observing Andre\nWeissflog's (floooh) chips, emulators of the 6502, VIC-II, CIA, SID and\nfriends that use pins as their interface. The next step was to take this\napproach, with his code as a starting point, to its logical extreme:\npin-level models of every other part of the C64, the RAMs, the ROMs, the\nlogic chips, the PLA, and so forth.\nThe chip cores are floooh's chips, taken from c64-llm (zlib license). The\nboard comes from bwack's C64-250407-Replica-KiCad (CERN OHL). The PLA\nequations come from the 82S100 read-out by Mark Smith and Marko M\u00e4kel\u00e4.\nBuilding\nmake\n./c64-hw-sim [program.prg]\n\nIt runs on macOS and Linux (X11), with OpenGL. The graphics library (sokol)\nand the interface library (nuklear) are in third_party/.\nUsing it\nThe window shows the board, the monitor, a control panel and an\noscilloscope.\nChips are boxes named by role:\n\nRAM1 to RAM8 are the 4164 DRAMs. Each one holds a single bit of every\nbyte: RAMn has data bit n-1.\nVRAM is the 2114 color RAM.\nBASIC, KERNAL and CHAR are the ROMs.\nPLA is the address decoder.\n\nZoom in to see references and address ranges. Pins show their state as a\nlogic probe would: red high, blue low, yellow pulsing, gray floating,\nmagenta when two outputs fight.\nClick a pin to put it on the oscilloscope and to break it: floating,\nshorted to GND, or shorted to +5V. Click a chip to pull it out. Click a\nresistor, a ferrite bead or the crystal to open it. The control panel\nlists the faults, each with a repair button.\nThe control panel also loads .prg files. They are written straight into\nthe DRAM chips, as a freezer cartridge would do it, so loading works on a\nbroken board too.\nType on your keyboard as usual. ESC is RUN/STOP, PgUp is RESTORE, TAB is\nCTRL, and left ALT is C=.\nCommand line\n./c64-hw-sim --headless 200 --text --shot out.png --fault U17:removed\n\nThis runs four seconds (200 frames) without a window. It prints the text\nread from the monitor picture, as a person would read it, and saves the\npicture. A fault is written REF:what or REF.PIN:what:\nU17:removed   U21.14:gnd   U12.14:vcc   U9.2:open   R51:open   RP4:short\n\nOther options:\n\n--at 150:U6.17:open --at 300:repair breaks and repairs parts while the\nC64 runs.\n--nets reports the nets where outputs fought.\nC64HW_TYPE=$'PRINT 1+1\\n' types text after boot.\nC64HW_CHECK=1 checks every KERNAL read and every VIC fetch against the\nideal memory map.\n--record 900:DIR --frames 90 (graphical mode) saves the window 90\ntimes, every 4 emulated frames from frame 900 on. This is how the GIF\nabove was made.\n\ntests/faults.sh runs 31 common faults. The expected symptom of each one\nwas written down before the simulator was run.\nHow it works\ntools/kicad2c.py turns bwack's KiCad replica of the 250407 into C tables:\n216 parts, their pads, and 249 nets.\nEvery pin drives its net strongly, weakly (a pull-up), from a supply short,\nor not at all. The strongest drive wins. Two equal drives fighting are a\ncontention, and low wins.\nA net that nobody drives keeps its charge, and then drifts:\n\nto about 1.4V within microseconds, if TTL inputs load it;\ntoward 0V in a fraction of a second, if only MOS inputs are on it.\n\nMOS inputs compare that voltage, plus some noise, with their own threshold,\nso a floating line can read erratically.\nPower faults depend on the chip:\n\nA chip without VCC is dead.\nA chip without GND lets its outputs float high.\nA CMOS chip keeps running on phantom power, which reaches it through the\nprotection diodes of its pins.\n\nThe noise is seeded, so a run can be repeated exactly.\nsrc/parts.c models these parts at their pins:\n\nthe glue logic;\nthe ROMs;\nthe DRAMs, which latch the row on /RAS and the column on /CAS;\nthe color RAM;\nthe PLA, with its real logic equations.\n\nThe 6510, VIC-II, CIAs and SID are cycle-accurate cores from floooh's\nchips. In src/board.c each core sits in a socket that sees only its pins.\nEach half cycle runs in three steps: the row address, then /RAS falls,\nthen /CAS falls. The whole board settles after each step.\nPLAN.md explains the reasoning behind these choices.\nLimits\nIt is slow, between a third and half of real time on the computers listed\nabove, because every pin of every chip is simulated.\nThe floating and power models have the right shape, but their numbers\n(thresholds, drift times, crosstalk) are guesses. They are constants in\nsrc/sim.c.\nThese analog parts are not simulated: the video output, the SID filter,\nthe power supply, and the dot clock PLL.\nFaults inside a chip, such as bad DRAM cells or slow parts, and bridges\nbetween two nets are planned but not done."
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